
module MemoryData_Register(iMDReg, oMDReg, iReset, iClk);
	input [31:0] iMDReg;
	input iReset, iClk;
	output [31:0] oMDReg;
	reg [31:0] oMDReg;

	always @ (posedge iReset or posedge iClk)
	begin
		if(iReset)
			oMDReg <= 32'b0;
		else
			oMDReg <= iMDReg;
	end
	
endmodule